1. Technical Field
The present invention relates to a surface mount type crystal oscillator (hereunder, referred to as a “surface mount oscillator”) in which a crystal element and an IC chip are arranged in parallel, and in particular, to a surface mount oscillator in which the occurrence of stray capacity between an excitation electrode and a conducting path is suppressed.
2. Background of the Invention
A surface mount oscillator, because of its small size and light weight, is built-in as a source of frequency reference or time reference, particularly in portable electronic devices. For one such conventional example, a crystal piece and an IC chip are arranged within a container in parallel in the horizontal direction, and used for a thin electronic card including, for example, a SIM card (subscriber identity module card).
3. Prior Art
FIG. 3 is a drawing for describing a conventional example of a surface mount oscillator, wherein FIG. 3A is a plan view with cover removed, and FIG. 3B is a sectional view thereof.
As shown in FIG. 3, in the conventional surface mount oscillator, a crystal piece 2 and an IC chip 3 are housed within a sectionally concave-shaped container main body 1, and a metallic cover 4 is joined to an opening end surface 1c of the container main body 1 to thereby seal-enclose them therein. On this opening end surface 1c there is provided, for example, an annular metallic ring 5, and the metallic cover 4 is joined thereon by means of seam welding.
The container main body 1 comprises laminated ceramics 1a and 1b having a rectangular outer shape in plan view, and the four corner sections of an outer bottom surface 1d thereof have mount terminals 6 for a power supply terminal, an output terminal, a ground terminal, and a function terminal (for example, AFC terminal). Moreover, as necessary, on the external surface of the container main body 1 including the outer bottom surface 1d, there are provided communication terminals (not shown in the drawing) such as a crystal inspection terminal and a temperature compensation data writing terminal.
As shown in FIG. 3A, the crystal piece 2 is of a rectangular shape in plan view, excitation electrodes 7a and 7b are provided on the center area of both principle surfaces 2c and 2d thereof, and lead-out electrodes 8a and 8b extend out on both sides of one lengthwise end section of the crystal piece 2. Both sides of the one end section of the crystal piece 2 where the lead-out electrodes 8a and 8b extend out, are a corner section on one lengthwise side of the crystal piece 2 and a corner section on the other side. Here, each of the lead-out electrodes 8a and 8b respectively has a folded section 8c (refer to FIG. 4) that is folded toward the opposite surface of the principle surface of the crystal piece 2. Moreover, with the widthwise direction of the container main body 1 taken as the lengthwise direction of the crystal piece 2, the crystal piece 2 is arranged on an inner bottom surface 1e of the container main body 1. On this inner bottom surface 1e there are arranged crystal retention terminals 9a and 9b, and both sides of the one end section of the crystal piece 2 where the lead-out electrodes 8a and 8b extend out, are fixed to the crystal retention terminals 9a and 9b by means of electrically conductive adhesive agents 10a and 10b. 
As shown in FIG. 3A, the IC chip 3 is of a rectangular shape in plan view. On this IC chip 3 is integrated an oscillating circuit (not shown in the drawing) and, as necessary, a temperature compensation mechanism, and one principle surface thereof serving as a circuit forming surface, has IC terminals 11. One side 3a of the IC chip 3 is made adjacent to and opposed to the one lengthwise side 2a of the crystal piece 2, and is fixed onto circuit terminals 12 provided on the inner bottom surface 1e of the container main body 1 by means of ultrasonic thermal bonding, for example, with use of bumps 15a and 15b (so-called flip-chip bonding). Thereby, the crystal piece 2 and the IC chip 3 are arranged in parallel in the horizontal direction and housed on the inner bottom surface 1e of the container main body 1.
Here, the crystal retention terminals 9a and 9b are connected, via conducting paths 13a and 13b, to circuit terminals 12a and 12b, onto which the crystal terminals 11a and 11b in the IC terminals 11 are joined by means of the bumps 15. Moreover, a power supply terminal, an output terminal, a ground terminal, and a function terminal in the IC terminals 11 are respectively connected electrically, via conducting paths (not shown in the drawing), to the aforementioned mount terminals 6 corresponding thereto. In this case, for example, from one end section of the IC chip corresponding to one end section of the crystal piece 2 where the lead-out electrodes 8a and 8b extend out, on one side of the IC chip 3 opposed to one side of the crystal piece 2, there are sequentially arranged the crystal terminals 11a and 11b of two of the IC terminals 11 of the IC chip 3. Thereby, the distance of the conducting paths 13a and 13b between the crystal retention terminals 9a and 9b and the crystal terminals 11a and 11b of the IC terminals 11, is reduced, and the wiring capacity thereof is made small. (refer to Japanese Unexamined Patent Publication No. H09-83248)